1. Field of the Invention
Embodiments of the present invention generally relate to computer graphics, and more particularly to reading texture map data.
2. Description of the Related Art
Conventional graphics processors are exemplified by systems and methods developed to read data stored in texture maps, commonly referred to as texels. Conventionally, texture maps are stored in a graphics memory device and texels read from a texture map are returned to the graphics processor after several clock cycles. Graphics processing may stall and not continue processing data while waiting for the texels. Alternatively, a buffer may be dedicated to storing processed data that requires the texels for further processing. The size of the buffer should correspond to the maximum texture map read latency in order to avoid stalling the processing. Since the texture read latency may be non-deterministic, the buffer size may need to be quite large.
The graphics memory device that stores the texture maps is typically also used to store frame buffer data, including one or more display buffers. The bandwidth between the graphics memory device and the graphics processor is used to access texture maps and frame buffer data. Sometimes graphics processing performance is limited by the bandwidth available between the graphics memory device and the graphics processor.
Accordingly, there is a need to minimize unnecessary texture fetches of texels that do not contribute to the final shaded pixel value in order to improve graphics processing performance.